Associate Engineer, Digital Design Engineering

Job description

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X. Engineer, Digital Design Engineering ADI At A Glance Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare. ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future. Analog Devices operates at the center of the modern digital economy, converting real-world phenomena into actionable insight with its comprehensive suite of analog and mixed signal, power management, radio frequency (RF), and digital and sensor technologies. ADI serves 125,000 customers worldwide with more than 75,000 products in the industrial, communications, automotive, and consumer markets. ADI is headquartered in Wilmington, MA. Visit http://www.analog.com. The Role: We are looking for an ASIC Implementation Engineer to be part of our digital design team to innovate and design complex leading SOCs for different applications like wireless RF communication, optical communication, power management and instrumentation. The engineer will work with the digital design engineering team undertaking the responsibility of design, verification, and ASIC implementation of the digital part of complex ASIC chips. He/she will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, antenna fixing, signal integrity analysis, power grid analysis and DFT integration in a full digital ASIC implementation flow. The role also includes working closely with the testing team and applications teams on product support and customer support. The Candidate: The candidate should have relevant experience in digital ASIC implementation flow. He/She might take ownership of designing some RTL modules for the ASIC chip and/or for FPGA prototyping purposes. He/She should be self-independent, good communicator, willing to participate in enhancing overall work processes, especially in the part related to digital ASIC implementation flow. He/She should have the passion and enthusiasm to learn about new communication protocols, new areas in digital design and chip-bring-up, testing and debugging. Responsibilities: Will be responsible for synthesis, floor-planning, timing constraints, formal verification, clock tree optimization, routing, extraction, timing closure, antenna fixing, signal integrity analysis, power grid analysis, …etc in a full digital ASIC implementation flow. Own block-level STA timing closure across all modes and corners and independently develop timing ECOs as needed. Work closely with design teams to achieve closure on CTS, I/O timing, and DFT integration. Deliver a clean GDSII to fab after executing physical verification sign off checks such as DRC, antenna, and LVS. Enhance ASIC flow automation using scripting and AI tools. Requirements: BSc Degree in Electrical / Electronic and Communications Engineering or equivalent. 0-1 years of experience in ASIC digital implementation flow (from RTL to GDSII) Excellent knowledge in ASIC digital implementation flow (from RTL to GDSII). Practical experience in using commercial EDA tools such as Synopsys and Cadence. Knowledge of DFT integration techniques such as SCAN/MBIST and ATPG using EDA tools is a plus. Very good knowledge of Linux environment and shell commands. Very good programming and scripting skills (Shell, Tcl, Python and/or Perl). Very good knowledge in digital logic design practices and techniques. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days