Senior Staff Engineer Design Bangalore Btp

Job description

Define, develop, verify, and implement RTL designs for mixed-signal subsystems and standalone IPs from concept through silicon realization. Collaborate closely with analog, verification, and physical design teams to deliver high-quality mixed-signal solutions. Architect and implement digital control logic for complex mixed-signal IPs, ensuring seamless integration and functionality. Strong expertise in RTL design and development for mixed-signal IPs such as PLLs, ADCs, SerDes, PMUs, and complex signal-chain architectures. Hands-on experience in designing and implementing Finite State Machines (FSMs) and digital control logic for Power Management Units (PMUs) and related low-power applications. Proficiency in developing and maintaining synthesis constraints (SDC), timing constraints, and implementing coverage-driven design methodologies. Strong understanding and practical experience in low-power design techniques, including creation and maintenance of UPF (Unified Power Format) for designs spanning multiple power domains. Experience with RTL coding in Verilog/System Verilog, linting, CDC/RDC analysis, synthesis, and timing closure methodologies. Good understanding of mixed-signal design flows and digital-analog interface requirements. We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Vidhi Thakkar