Senior Engineer Design Bangalore Btp

Job description

Own and drive STA flow and signoff methodology for HOBTO and Bixby Creek platforms. Develop, qualify, and deploy scalable timing signoff methodologies. Automate flow validation, regression testing, and STA infrastructure. Collaborate with Physical Design, Design Signoff, and global R&D teams to deliver production-quality STA solutions. Improve flow efficiency, accuracy, and robustness through continuous methodology enhancements. Own and drive STA methodology initiatives, including roadmap planning, issue resolution, and deployment of new features. Develop and maintain STA flows encompassing MMMC setup, setup/hold analysis, OCV/AOCV/POCV implementation, SI-aware timing analysis, and voltage-aware STA methodologies. Design, enhance, and support reusable STA infrastructure, automation solutions, and regression frameworks using Tcl, Python, and Linux scripting. Plan and execute regression testing for methodology updates and tool-version qualifications; analyze QoR correlations and debug timing discrepancies. Collaborate with Cadence R&D and internal stakeholders to investigate tool issues, track JIRs, and validate fixes. Drive improvements in flow runtime, scalability, and robustness while ensuring signoff-quality standards are maintained. Represent the India STA Methodology team in technical reviews and lead cross-site collaboration to ensure technical alignment and best-practice adoption. We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.