Senior Engineer Verification San Jose Ca

Job description

Architect and implement FPGA solutions for prototyping platform and link partner platform. Develop and maintain FPGA build (simulation, synthesis, P&R, timing closure, bitstream generation, regression). Integrate FPGA logic with embedded software, drivers, and host interfaces (Ethernet, USB, UART, SPI, I2C, etc.) Bring up FPGA platforms: board-level testing, power-on sequencing, clocking/reset strategy, and peripheral enablement Perform system-level debug Document platform architecture, integration guides, and best practices to enable internal users and downstream teams. Bachelor's or master's degree in electronic engineering, Computer Engineering, or related field (or equivalent experience) Strong FPGA development experience using Verilog/SystemVerilog and/orVHDL. Hands-on experience with tools (e.g., Xilinx Vivado/Synplify). Experience with verification and debug: simulation (e.g.,VCS/ModelSim), test benches, assertions, and on-chip debug tools. Scripting/automation experience (Python, Tcl) to improve build flows and productivity. We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.