Silicon Design Engineer

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. Silicon Design Engineer 2 - Security IP THE ROLE: An ASIC design engineering role in our Security IP team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) silicon products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our design and verification engineers will work on block level functional design and verification and/or subsystem level integration and verification for a variety of embedded MP subsystems. Your contribution will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications. THE PERSON: A talented electrical or computer engineering recent grad with demonstrated strong academic records of relevant courses and projects in hardware logic design and computer architecture, above average capability of C/C++, Verilog or System Verilog programming, fast learning of technical concepts, and analytic thinking. A strong written and verbal communicator with excellent problem solving and attention to detail skills along with professional interpersonal communication capability. THE ROLE: Develop and refine MP subsystem design and verification workflow and methodology by creating and debugging automation scripts Modify and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches and tests Set up and debug test regressions, analyze simulation results, resolve technical issues with design, verification teams Develop and debug test plans using SystemVerilog/UVM constrained-random test methodology and C-DPI directed test methodology, and using object-oriented programming (OOP) techniques to implement/maintain testbenches and tests PREFERRED EXPERIENCE: Completed a minimum of 4 years of academic study in Electrical Engineering, Computer Engineering, or Computer Science with strong records in relevant technical courses and projects Excellent in programming using C/C++, one or more of Ruby, Perl, Python and Makefile Basic understanding of computer architecture, digital circuits and systems Basic knowledge about Verilog and System Verilog languages Basic knowledge about ASIC design & verification tools Basic knowledge in AI based design concepts Prior experience with ASIC IP design through internship is an asset ACADEMIC CREDENTIALS: Bachelor ’ s or M aster’s in electrical engineering , c omputer e ngineering, or comparable disciplines Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.