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Analog Devices

Lead Designer, Layout

Analog Devices · US, AZ, Chandler, East Elliot

Full-timeOn-sitePosted 30 September 2026
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Job description

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X. About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader bridging the physical and digital worlds. ADI develops high-performance analog, mixed-signal, and digital signal processing technologies serving industrial, automotive, communications, healthcare, and energy markets. With approximately 24,000 employees worldwide and annual revenue exceeding $9 billion, ADI combines engineering innovation with deep customer collaboration to solve the most complex challenges at the Intelligent Edge. About the RoleAs a Lead Designer, Layout, you will execute full-custom analog and mixed-signal IC layouts from floorplan through signoff, developing parasitic-aware layout strategies that support products spanning multiple ADI business units. Key ResponsibilitiesExecute full-custom layout for analog and mixed-signal blocks including power stage FET metallization, LDOs, references, gate drivers, charge pumps, signal conditioning, and data converters (SAR, delta-sigma, pipeline ADC, precision DAC) Develop block-level and chip-level floorplans optimizing area, routing, power distribution, and signal integrity Apply precision matching techniques including common centroid, interdigitation, interleaving, merging, and symmetry, with noise isolation through guard rings, shielding, and deep N-well structures Perform physical verification (DRC, LVS, ERC) and parasitic extraction, collaborating with circuit designers on post-layout optimization and silicon correlation Support layout methodology improvements and junior designer development through SKILL scripting, AI/ML-driven automation, and knowledge sharing Required Skills and Experience7+ years of custom analog/mixed-signal IC layout experience Strong proficiency with Cadence Virtuoso Layout Suite and physical verification tools (Calibre or Cadence PVS) Proven track record delivering layouts through tapeout and production release Proven experience in precision matching layout for bipolar and MOS transistors, resistors, and capacitor arrays in CMOS and BCD processes, including latch-up prevention and substrate isolation to minimize parasitic carrier injection and collection Proficiency in parasitic extraction, layout-dependent effects, and post-layout simulation correlation Excellent presentation, technical writing, and communication skills Preferred QualificationsExperience or strong interest in applying AI/ML to layout automation, including generative layout, placement optimization, DRC-aware routing, and predictive parasitic estimation Proficiency in SKILL scripting or Python/TCL automation for layout productivity Familiarity with high-voltage and BCD process layout including DMOS/LDMOS metallization for Rdson minimization, gate metal strapping, ESD structures, and multi-voltage domain isolation Technical ScopeFull-custom analog layout ownership from floorplan through signoff, with emphasis on power FET metal routing for balanced current distribution and Rdson optimization Parasitic extraction, electromigration analysis, and IR drop assessment across analog signal paths and power domains Design-for-reliability and manufacturability including ESD protection, latch-up prevention, DFM checks, density balancing, yield-aware practices, and AI/ML-driven automation workflows Collaboration and ImpactWork with circuit design and product definition teams to translate performance requirements into layout strategies Support evaluation of new process capabilities and identify layout optimization opportunities for next-generation technologies Why Join ADIAt Analog Devices, you will work on meaningful engineering problems with real-world impact alongside world-class engineers. ADI fosters a culture of technical excellence, continuous learning, and collaboration, providing opportunities to grow while contributing to technologies that shape the future of the intelligent edge. With a 60-year heritage of innovation and a Fortune 500 environment, ADI offers competitive compensation, outstanding benefits, and access to cutting-edge design tools and state-of-the-art laboratories. Equal Opportunity Employer: Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Export Control Notice: This position may require access to technology controlled under the U.S. Department of Commerce and/or the U.S. Department of State. Appropriate approvals may be required before an offer can be extended to non-US persons. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

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