Senior Manager, Analog Methodology & AI Innovation Boxborough, Massachusetts Category: Engineering Posted: 10.06.2026 Job ID: 19052

Job description

Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Job Description Date posted 10/06/2026 Category Engineering Hire Type Employee Job ID 19052 Base Salary Range $175000-$263000 Remote Eligible No Date Posted 10/06/2026 We Are: At Synopsys, our Silicon IP business is expanding to serve growing demand for special-purpose silicon. We are moving beyond traditional standards-based IP into application-optimized IP (AOIP), helping customers develop differentiated silicon tailored to specific workloads and system architectures. As AI drives demand for custom silicon across hyperscalers and system companies, we use our interface IP leadership, system expertise, and engineering scale to deliver optimized IP subsystems and platforms that accelerate time-to-market while improving performance and efficiency. The acceleration of frontier intelligence is fueling an unprecedented demand for compute power while increasing system complexity, and purpose-built silicon is reshaping the IP market. You Are: You are an experienced and passionate Analog Methodology Engineer with a deep understanding of mixed-signal circuit design principles and emerging AI/ML technologies. You thrive in a collaborative environment and work well with a cross-functional team of experts. Your hands-on experience with transistor-level simulation, reliability analysis, and static timing analysis (STA) sets you apart. You are proficient in scripting and automation, and you use those skills to streamline design processes and mentor other engineers. You apply AI and machine learning to analog circuit optimization, your knowledge spans analog and mixed-signal circuits, and you have a strong background in silicon IP release requirements. You are also credible with customers, product teams, and foundries, and you can turn methodology strategy into decisions other organizations will adopt. Your communication is clear, and you are self-motivated, detail-oriented, and committed to excellence. What You’ll Be Doing: The Analog Integration Team (AIT) exists to coordinate and accelerate methodology adoption across analog and adjacent engineering domains, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and other mixed-signal cross-domain workflows. In this role, you will: Provide clear ownership for analog and adjacent-domain methodology areas. Act as the focal point for customer-driven methodology requirements and integration challenges. Be accountable for prioritization, adoption, stakeholder engagement, and execution. Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries. Support methodology for application-optimized IP and the special-purpose silicon customers are building for specific workloads and system architectures. The Impact You Will Have: Establish sustainable ownership for analog and adjacent-domain methodologies. Improve responsiveness to customer methodology requirements. Reduce ambiguity on methodology ownership and escalation paths. Improve alignment between methodology strategy and execution. Accelerate methodology adoption for strategic initiatives and customers, including application-optimized IP for special-purpose silicon. Provide measurable accountability for methodology development, deployment, and customer engagement. Who You Are: You have a Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field; MSEE or PhD preferred. You have 18-25 years of experience in IC design with a BSEE degree, or 15-18 years with an MSEE or PhD. You have extensive knowledge of analog design methodology and of several related areas, including simulation methodology and other mixed-signal methodology domains. You have a strong command of transistor-level design, CMOS fundamentals, reliability effects, and SPICE-based verification, deep enough to direct methodology execution. You have experience running analog design methodology execution for special-purpose silicon tailored to specific workloads and system architectures. You have enough depth in adjacent analog methodology areas to represent that work with partner teams. You manage analog design and/or analog methodology resources, with accountability for staffing, methods, budgets, schedules, and results. You oversee operational and functional objectives, and you contribute to short-term operational plans with measurable results for the department. You address complex issues and implement policies and evaluation criteria that support broader business change when necessary. You are the primary customer interface for analog design methodology execution. You work with senior management across several functions, and with product, program, and go-to-market partners on planning and execution. You influence others in sensitive situations. That includes partner teams that own methodology outside your group’s direct competency, and technology and other organizations outside the IP group. The Team You’ll Be a Part Of: You will join the Analog Integration Team (AIT). AIT coordinates and accelerates methodology adoption across analog and adjacent engineering domains. The team owns those methods end-to-end: customer requirements, integration challenges, prioritization, stakeholder engagement, and execution. You will work with product teams, adjacent engineering organizations, and directly with customers and foundries. The team’s job is to turn methodology strategy into accountable action and to help strategic IP programs adopt it faster. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusive work culture supporting diverse backgrounds and experiences. Reasonable accommodations available throughout the recruitment and employment process. For accommodation requests, contact hr-help-canada@synopsys.com . #LI-AD2 At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. Apply Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for y