Principal Hardware Engineer

Job description

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Hardware Engineering group designs the high-volume production boards and systems that bring our infrastructure semiconductor solutions to market. These boards power the AI data center, network security, and high-speed connectivity products that move, store, and secure the world’s data. This group works closely with silicon, firmware, and system teams to turn deep system-level knowledge and leading intellectual property into reliable products for the global data economy, whether deployed at the network core or the edge. What You Can Expect The Principal Hardware Engineer will lead the design of these boards from concept through production, working on custom ASIC solutions built on 3nm technology and high-speed SerDes for large-scale data center applications. In this role you will Develop high density, high volume next generation products. Work with Hardware and software engineers to design products, test and debug issues. Provide technical and engineering support to strategic customers, including creation and presentation of power point files for customer review and discussions Work directly with customers to address design challenges, debug failures, and ensure successful product integration. Design high‑performance board‑level systems for storage, network security, and custom ASIC applications. Manage designs with JDM partners to provide design guidance, support build readiness and ensure production quality. Define, design, and review schematics from internal hardware teams and JDM, with emphasis on high‑speed signal integrity, power integrity, and cost‑optimized designs for high‑volume production. Work closely with the internal board development, DVT and SI teams to make sure board issues are addressed, resolved, and closed Conduct design reviews with clear documentation, and provide technical leadership throughout the product development cycle. Collaborate with cross‑functional teams to ensure product performance, reliability, and quality. Facilitate technical discussions and drive resolution of complex engineering issues. What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. OR  Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience. 5+ years experience designing high speed digital circuitry on complex high density printed circuit board assemblies including Ethernet controllers, microcontrollers and processors 5+ years experience in working with ODMs 5+ years of experience in designing high density boards with fine pitch components and micro vias. Expertise in High Speed designs, Interfaces such as DDR4/5, PCIe Gen5+, 100G Ethernet, QSPI, USB, using medium to high end CPUs Good knowledge of power supply designs, hands on measurement experience Good debug skills and experience in using lab equipment Expertise in design for optimum signal and power integrity Demonstrates customer-facing experience with excellent verbal and written communication skills Understanding mechanical components and their usage in board design is required Familiarity with Cadence Allegro schematics and layout tools Proven critical-thinking abilities, strong problem-solving skills, and a sense of ownership for team and project outcomes Basic Linux proficiency for system test environment setup (highly preferred) Grounded, detail-oriented, always backs up ideas with facts. Expected Base Pay Range (USD) 150,680 - 225,700, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TM1