R&D Engineering Scientist Sunnyvale, California Category: Engineering Posted: 10/25/2026 Job ID: 18829

Job description

Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Job Description Date posted 10/25/2026 Category Engineering Hire Type Employee Job ID 18829 Base Salary Range $244000-$366000 Remote Eligible No Date Posted 10/25/2026 We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips. Join us to transform the future through continuous technological innovation. You Are You are an experienced PHY and SerDes architect with deep knowledge of high-speed serial links. You translate complex protocol, channel, and system requirements into implementable architectures while balancing power, performance, area, latency, and reliability. You communicate effectively across analog, digital, signal-integrity, package, program, and customer-facing teams. What You’ll Be Doing Own the PHY architecture, including protocols, data rates, BER, and PPA targets. Define data-path and clocking architectures, including modulation, equalization, FEC placement, ADC-DSP, PLL, and CDR. Lead calibration and adaptation strategies across process, voltage, temperature, and channel conditions. Allocate power, area, performance, and latency across analog, digital, and package components. Develop block specifications that engineering teams can implement and verify. Close the end-to-end link budget across the transmitter, package, channel, and receiver. Define architecture sign-off, modeling, observability, and silicon bring-up requirements, including loopback, PRBS, eye scan, and calibration access. Align standards, signal and power integrity, package, and program teams on guaranteed IP performance. The Impact You Will Have Define advanced 112 Gb/s and 224 Gb/s PAM4 PHY architectures. Improve first-silicon success through rigorous link budgeting, modeling, and observability. Reduce integration risk by establishing clear cross-functional specifications and sign-off criteria. Enable differentiated, high-performance interface IP for advanced silicon applications. What You’ll Need Strong architectural knowledge of 112 Gb/s and 224 Gb/s PAM4 serial links. Expertise in link budgeting, insertion and return loss, crosstalk, jitter, BER, channel operating margin, and FEC coding gain. Deep knowledge of CTLE, FFE, DFE, ADC-DSP, PLL, CDR, adaptation, and calibration. Experience with channel and behavioral modeling, process-corner analysis, and analog, digital, and package PPA tradeoffs. Silicon bring-up and debug experience using PRBS, loopback, eye scan, and calibration capabilities. Demonstrated ability to write clear technical specifications and explain architecture decisions to technical, program, and customer audiences. Who You Are A systems thinker who connects circuit-level decisions to end-to-end link performance. A collaborative technical leader who works effectively across disciplines and geographies. A clear communicator who translates complex tradeoffs into actionable decisions. A pragmatic problem solver focused on quality, performance, and silicon success. The Team You’ll Be a Part Of You will join a multidisciplinary team developing advanced high-speed PHY IP. You will collaborate with analog, digital, verification, signal-integrity, power-integrity, package, and silicon-validation teams to deliver measurable and differentiated system performance. Rewards and Benefits We offer comprehensive health, wellness, and financial benefits. Our total rewards include monetary and non-monetary offerings. Your recruiter will provide additional details during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. Apply Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Sunnyvale View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! BROWSE JOBS Find the open role that’s right for you Sr Manager or Principal Engineer for Firmware Development - 19315 Markham, Canada R&D Engineering, Sr Staff Engineer Austin, Texas Physics AI Internship (Summer 2027) Sunnyvale, California R&D Engineering Scientist Sunnyvale, California View all job opportunities here View all job opportunities here View All Jobs Awards We're proud to receive several recognitions Explore the Possibilities with Synopsys Search Synopsys Careers Join our Talent Community Follow #lifeatSynopsys X LinkedIn Facebook YouTube Instagram