Kyiv Junior DV And FPGA Prototyping Engineer

Job description

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same. Your Role Your on-job tasks would consist of: - Studying AMD Vivado and Vitis IDE - Modelling (Python) and RTL implementation (System Verilog) of the proposed image and/or audio processing algorithms - Building FPGA environment and debug of the implemented RTL design using Zybo Z7 board - Building SV based verification environment for simple RTL designs like FIFO, UART. We’d expect you to learn: